Suppose we have the following measurements:
Frequency of FP operations = 15%
Average CPI of FP operations = 8.0
Average CPI of other instructions = 1.6
Frequency of (FP divide) DIV.D = 3%
CPI of DIV.D = 25
Compare two design alternatives.
Decrease CPI of DIV.D to 20 for a cost of $X, or
Decrease average CPI of all FP operations to 7.0 for a cost of $2X.
Compare these alternatives using the processor performance equation.
(a) What is the speedup of the two alternatives?
(b) Say just a few words about which is the most cost effective option and why for the situation given in this problem and for a computer design that will run a wide range of end user FP applications. Would further experimentation be helpful?